// (C) 2022 Intel Corporation. All rights reserved.
// Your use of Intel Corporation's design tools, logic functions and other 
// software and tools, and its AMPP partner logic functions, and any output 
// files from any of the foregoing (including device programming or simulation 
// files), and any associated documentation or information are expressly subject 
// to the terms and conditions of the Intel Program License Subscription 
// Agreement, Intel FPGA IP License Agreement, or other applicable 
// license agreement, including, without limitation, that your use is for the 
// sole purpose of programming logic devices manufactured by Intel and sold by 
// Intel or its authorized distributors.  Please refer to the applicable 
// agreement for further details.

package i3c_pkg; 

    typedef enum logic [3:0] {
        REQUEST_IDLE               = 4'b0000,
        REQUEST_STATE_CAP_ACK_NACK = 4'b0001,
        REQUEST_START              = 4'b0010,
        REQUEST_STOP               = 4'b0011,
        REQUEST_TRANSITION_PARITY  = 4'b0100,
        REQUEST_ACK                = 4'b0110,
        REQUEST_NACK               = 4'b0111,
        REQUEST_ADDRESS            = 4'b1000,
        REQUEST_DATA               = 4'b1001,
        REQUEST_GENERATE_INTERRUPT = 4'b1010
    } request_t;

    typedef enum logic [4:0] {
        STATUS_SINGLE_START                       = 5'b00000,
        STATUS_REPEATED_START                     = 5'b00001,
        STATUS_STOP                               = 5'b00010,
        STATUS_TRANSITION_PARITY                  = 5'b00100,
        STATUS_TRANSITION_END                     = 5'b00101,
        STATUS_TRANSITION_END_WITH_REPEATED_START = 5'b00110,
        STATUS_TRANSITION_CONTINUE                = 5'b00011,
        STATUS_ACK                                = 5'b00111,
        STATUS_NACK                               = 5'b01000,
        STATUS_ADDRESS                            = 5'b01001,
        STATUS_ADDRESS_LAST                       = 5'b01010,
        STATUS_DATA                               = 5'b01011,
        STATUS_DATA_LAST                          = 5'b01111,
        STATUS_IDLE                               = 5'b10000,
        STATUS_IBI_START                          = 5'b10001,
        STATUS_IBI_ADDRESS                        = 5'b10010,
        STATUS_IBI_ADDRESS_LAST                   = 5'b10011
    } status_t;

    typedef enum logic [2:0] {
        LINK_STATE_IDLE         = 3'h0,
        LINK_STATE_START        = 3'h1,
        LINK_STATE_REPEAT_START = 3'h2,
        LINK_STATE_STOP         = 3'h3,
        LINK_STATE_WRITE        = 3'h4,
        LINK_STATE_READ         = 3'h5,
        LINK_STATE_ACK_NACK     = 3'h6,
        LINK_STATE_TRANSITION   = 3'h7

    } link_state_t;

    typedef enum logic [1:0] {
        TRANSITION_STATUS_CNT              = 2'b00,
        TRANSITION_STATUS_SLAVE_END        = 2'b01,
        TRANSITION_STATUS_MASTER_END       = 2'b10,
        TRANSITION_STATUS_SLAVE_MASTER_END = 2'b11
    } transition_status_t;

    typedef enum logic [0:0] {
        PUSH_PULL  = 1'b0,
        OPEN_DRAIN = 1'b1
    } link_mode_t;

    typedef enum logic [0:0] {
        DEVICE_I3C = 1'b0,
        DEVICE_I2C = 1'b1
    } device_t;

    typedef enum logic [1:0] {
        MASTER_ONLY      = 2'h1,
        SLAVE_ONLY       = 2'h2,
        SECONDARY_MASTER = 2'h3
    } operation_mode_t;

    typedef enum logic [0:0] {
        TRANSITION_END = 1'b0,
        TRANSITION_CNT = 1'b1
    } transition_t;

    typedef enum logic [7:0] {
        CCC_CMD_UNDEFINED           = 'X,
        CCC_CMD_BRDCAST_ENEC        = 8'h00,
        CCC_CMD_BRDCAST_DISEC       = 8'h01,
        CCC_CMD_BRDCAST_ENTAS0      = 8'h02,
        CCC_CMD_BRDCAST_ENTAS1      = 8'h03,
        CCC_CMD_BRDCAST_ENTAS2      = 8'h04,
        CCC_CMD_BRDCAST_ENTAS3      = 8'h05,
        CCC_CMD_BRDCAST_RSTDAA      = 8'h06,
        CCC_CMD_ENTDAA              = 8'h07,
        CCC_CMD_DEFSLVS             = 8'h08,
        CCC_CMD_BRDCAST_SETMWL      = 8'h09,
        CCC_CMD_BRDCAST_SETMRL      = 8'h0A,
        CCC_CMD_ENTTM               = 8'h0B,
        CCC_CMD_SETBUSCON           = 8'h0C,
        CCC_CMD_BRDCAST_ENDXFER     = 8'h12,
        CCC_CMD_ENTHDR0             = 8'h20,
        CCC_CMD_ENTHDR1             = 8'h21,
        CCC_CMD_ENTHDR2             = 8'h22,
        CCC_CMD_ENTHDR3             = 8'h23,
        CCC_CMD_ENTHDR4             = 8'h24,
        CCC_CMD_ENTHDR5             = 8'h25,
        CCC_CMD_ENTHDR6             = 8'h26,
        CCC_CMD_ENTHDR7             = 8'h27,
        CCC_CMD_BRDCAST_SETXTIME    = 8'h28,
        CCC_CMD_SETAASA             = 8'h29,
        CCC_CMD_BRDCAST_DEFRST      = 8'h2E,
        CCC_CMD_BRDCAST_RSTACT      = 8'h2A,
        CCC_CMD_DEFGRPA             = 8'h2B,
        CCC_CMD_BRDCAST_RSTGRPA     = 8'h2C,
        CCC_CMD_DIRECT_ENEC         = 8'h80,
        CCC_CMD_DIRECT_DISEC        = 8'h81,
        CCC_CMD_DIRECT_ENTAS0       = 8'h82,
        CCC_CMD_DIRECT_ENTAS1       = 8'h83,
        CCC_CMD_DIRECT_ENTAS2       = 8'h84,
        CCC_CMD_DIRECT_ENTAS3       = 8'h85,
        CCC_CMD_DIRECT_RSTDAA       = 8'h86,
        CCC_CMD_SETDASA             = 8'h87,
        CCC_CMD_SETNEWDA            = 8'h88,
        CCC_CMD_DIRECT_SETMWL       = 8'h89,
        CCC_CMD_DIRECT_SETMRL       = 8'h8A,
        CCC_CMD_GETMWL              = 8'h8B,
        CCC_CMD_GETMRL              = 8'h8C,
        CCC_CMD_GETPID              = 8'h8D,
        CCC_CMD_GETBCR              = 8'h8E,
        CCC_CMD_GETDCR              = 8'h8F,
        CCC_CMD_GETSTATUS           = 8'h90,
        CCC_CMD_GETACCMST           = 8'h91,
        CCC_CMD_DIRECT_ENDXFER      = 8'h92,
        CCC_CMD_SETBRGTGT           = 8'h93,
        CCC_CMD_GETMXDS             = 8'h94,
        CCC_CMD_GETHDRCAP           = 8'h95,
        CCC_CMD_DIRECT_SETXTIME     = 8'h98,
        CCC_CMD_GETXTIME            = 8'h99,
        CCC_CMD_DIRECT_RSTACT       = 8'h9A,
        CCC_CMD_DIRECT_SETGRPA      = 8'h9B,
        CCC_CMD_DIRECT_RSTGRPA      = 8'h9C,
        CCC_CMD_DIRECT_DEFRST       = 8'h9E
    } ccc_cmd_t;

endpackage
